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Intel Delivers 'Tulsa' Xeon MP Server Chip Early

Quoting IT Jungle

Intel will today roll out its next-generation Xeon MP processor for high-end servers, code-named "Tulsa" and sold under the Xeon 7100 series brand name. The Tulsa chips are, unlike their "Paxville" Xeon MP predecessors, true dual-core processors. They are not just two single-core chips jammed into a chip package that fits in a single processor socket. Servers using the Tulsa chip can deliver between 60 and 70 percent more performance than those using the Paxvilles. And they are coming to market a little bit earlier than expected.

But, being earlier than the Intel roadmap does not mean that the Tulsa chips were timed to the market correctly. Intel has had a number of weaknesses in its server processor lineup in the past two years, which rival Advanced Micro Devices has been able to exploit with its Opteron products. Intel really needed the Tulsa Xeon 7100 series (formerly know as the Xeon MPs) and "Woodcrest" Xeon 5100 series (formerly known as the Xeon DPs) to market a year or more ago.

Intel has closed the performance and wattage gap with Opterons in the two-socket server space with its Woodcrest chips earlier this year, thanks to the new Core microarchitecture. The Tulsa chips are based on the older and hotter NetBurst architecture used in prior Xeon processors. While Intel has been able to boost performance significantly--thanks in large part to cache memory--the Tulsa chips have 95 watt and 150 watt thermal envelopes, the latter of which is a bit on the hot side. The top performing parts, which have the higher clock speeds and larger caches, run at the higher temperature. If heat is not an issue, then the Tulsa will make a lot of Intel customers happy. But where heat is an issue, the Opterons will probably still have an advantage. If heat is an issue, Intel has 95 watt parts, but they do not run as fast.

The Tulsa chips are socket-compatible with the "Potomac" single-core Xeon MP processors, launched in March 2005, and the dual-core Paxville Xeon MP, which Intel yanked forward into November 2005. The Paxville Xeon MP chip was initially expected in early 2006, but competitive pressure from the Opterons motivated Intel to pick up the pace, much as the Tulsa chips were expected in late 2006 or early 2007 and were moved to this week because the heat is still on Intel in the four-socket and larger server space. The Potomac chips were the first 64-bit version of the Xeon MP, and the Paxville chips put two of these side-by-side using the same 90 nanometer process. HyperThreading was also added to the Paxville cores, which virtualizes the processor threads, providing two virtual threads where there used to be just one physical thread and thereby allowing a 20 percent or so boost in performance.

With Tulsa, Intel has created a true dual-core processor with 16 MB of L3 cache memory that is shared by the two cores on the die. The Tulsa chip is implemented in a 65 nanometer process, which is what allows such a large L3 cache. This cache consumes the bulk of the 1.3 billion transistors in the Tulsa chip, but only accounts for about 10 percent of the heat, according to Intel. The Tulsa and Paxville cores both have 16 KB of L1 cache and 1 MB of L2 cache, and these are tiny by comparison to that wonking L3 cache. The Itanium chips have had L3 cache for years, but this is the first Xeon MP to have it.

The Tulsa chip also includes Intel's VT hardware-assisted virtualization feature as well as the new Cache Safe Technology, which used to be called by the code name Pellston before it made its debut in the "Montecito" dual-core Itanium 9000s a month ago. Pellston error correction, which can cope with two-bit errors in caches, is necessary in part because the larger cache memories in Tulsa and Montecito chips increase the likelihood of such errors. Such caches substantially improve performance, which is why Intel bothers. The other reason you want such error correction is because Tulsa and Montecito chips are used in enterprise-class servers, and even with a smaller cache, you would want such scrubbing.

Intel created variants of Paxville MPs that supported the 800 MHz bus of the E8501 chipset as well as for the slower 667 MHz bus used in the E8500 chipset, and with Tulsa, customers that have servers using either chipset will be able to upgrade to a more powerful processor. The versions of the Xeon 7100 using the faster bus have an M designation after their name, while the chips using the slower bus and slightly lower clock speeds (in most cases) have an N designation. Four of the chips have a thermal design point of 150 watts, while the remaining four go as low as 95 watts. Anything 3 GHz or slower in clock speed has the lower 95 watt thermal envelope, which is right where AMD is with both the Rev E and Rev F generations of Opterons.

The Xeon 7140M is the top bin part, as they say in the chip lingo, and it runs at 3.4 GHz with an 800 MHz front side bus speed and the full 16 MB L3 cache; it costs $1,980. The 7130M runs at 3.2 GHz and has only 8 MB of L3 cache, and it costs $1,391. The 7120M part has 4 MB of L3 cache and runs at 3 GHz, costing $1,177, while the 7110M part runs at 2.6 GHz and costs $857. (All of those prices are based on the usual 1,000-unit quantities.)

Intel has kept the same price points for parts with the slower bus and somewhat lower clock speeds, which seems a bit bold. (If you don't want to have to upgrade your server to the E8501 chipset, you have to pay the same price for the chip as if you did.) The 7140N runs at 3.33 GHz, has a 16 MB cache, and the 667 MHz front side bus; it costs $1,980. The 7130N runs at 3.16 GHz, has an 8 MB L3 cache and costs $1,391. The 7120N has the same 3 GHz clock speed and the same 4 MB L3 cache as the 7120M, but it uses the 667 MHz bus speed and still costs the same $1,177. Finally, the 7110N chip runs at 2.5 GHz, has 4 MB of L3 cache, and costs $856.

Hewlett-Packard is upgrading two of its ProLiant servers with the Tulsa chip, and is playing as neutral as is possible when it comes to the whole Intel-AMD rivalry. HP is delivering Tulsa chips running at 2.6 GHz, 3 GHz, 3.2 GHz, and 3.4 GHz in the rack-mounted ProLiant DL580 G4 and the tower ML570 G4 server. These machines span up to four processor sockets and up to 64 GB of DDR2 main memory using 4 GB DIMMs. The base ML570 will cost $5,799 for a machine with a single Tulsa chip (that's two processor cores) and 1 GB of main memory, while a similarly configured DL580 will cost $6,649. These prices are roughly the same as the Paxville MP configurations, which means customers will see a big boost in bang for the buck.

Which is exactly what Intel needs to show to counter AMD's Opteron advances in the data center. But the question is, will it be enough?

"For the applications that matter for the kinds of servers that Tulsa goes into, we are finding ourselves ahead of Opteron in terms of performance," says Jason Waxman, director of marketing for Intel's server platforms group. Of course, that is using the 150-watt parts, too. But, says Waxman, in the high-end server market where these chips will be used, customers are interested in other features and are used to having processors that are warmer than what you find in an entry server.

"In the four-socket space, it really isn't just about a processor. People are looking for a lot of other things," explains John Gromala, director of ProLiant server product marketing. That means I/O slots, memory expansion, peripheral expansion, RAS features, and so on. But, they are also looking for performance, and the question is still whether or not Tulsa can blunt Opteron's advances. "Tulsa brings them closer together, but we still end up with situations where the applications are better for one platform or the other."

HP will launch its Tulsa machines with a two-tier SAP Sales and Distribution (SD) benchmark test. A ProLiant DL580 G4 with four Paxville MP chips running at 3 GHz was set up with 32 GB of memory plus Windows Server 2003 and SQL Server 2005 as well as the mySAP suite last year, and could support 1,315 SD users. Plunking the Tulsa chips into the DL580 and boosting the memory to 64 GB allowed the machine to support 2,127 users, an increase of 62 percent. HP Plans to release TPC-C benchmarks on its Tulsa machines as soon as it is done tweaking them.

Server maker Unisys is also keen on getting the Tulsa parts into its new ES7000/one server line. The ES7000/one servers launched in March, started shipping with Montecito chips mid-July, and will begin using the Tulsa chips in the fourth quarter. (Unisys is certifying the different SKUs in the wide variety of configurations available in the ES7000/one machines, which takes time.) According to Mark Feverston, vice president of platform marketing for enterprise servers at Unisys, the Tulsa chips will also be the first chips that Unisys puts into the next-generation server platforms that it is co-developing with partner NEC.

"We think of this as more than just a turn of the crank," says Feverston. "We have found it to be a pretty speedy chip, and the cache architecture allows us to get more scalability and performance than you might expect." Like other server vendors with big boxes, Unisys has been peddling the ES7000 line for the past six years as a server consolidation platform, but with the integrated VT support, dual-core chips, cache memory hierarchy, and larger memory available today, the ES7000/one servers, which span from 4 to 32 sockets, are capable of supporting more virtual servers than predecessors in the ES7000 line.

Incidentally, the ES7000/one line does not make customers choose Itanium or Xeon architectures. They can mix and match different processors within a system, provided different architectures are isolated in their own partitions. This will also be true of the future--and yet unnamed--NEC-Unisys machines.

Read the original article, here.

Published Tuesday, August 29, 2006 5:13 PM by David Marshall
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