Virtualization Technology News and Information
VaST High-Speed Virtualization Products Chosen by Epson
VaST, the leader in electronics virtualization, today announced that Seiko Epson Corp. (Epson) has selected VaSTs CoMET as the development tool for printer product design. Epson's extensive evaluation of CoMET showed it was easy to use and significantly improved software development productivity.

CoMET combines high-speed, and cycle-accurate virtualization technology in a platform development environment that accelerates electronic systems development. Unlike conventional tools, such as instruction set simulators, CoMET enables system design and virtualization with characteristics similar to real hardware. CoMETs virtual environment allows both LSI designers and software developers to perform software and system integration early in the design flow.

"We evaluated VaSTs CoMET and were impressed with its execution speed, accuracy, and debug visibility of virtual prototype," said Tsuyoshi Aoyama, general manager in the Consumer Products Operations Department of Epsons Imaging Products Operations Division. "VaST technology enables software development and validation on virtual hardware platforms long before prototype boards or LSIs are available. We expect that we can accomplish reductions in both total development time and project risk and improve the quality of the hardware/software system much earlier in the design flow."

VaST supports of a wide variety of processors and provides several co-simulation interfaces that allow heterogeneous operation with mechanical model simulators. This flexible system design environment enables users to prepare more complete system descriptions at early stages of development.

Alain Labat, CEO of VaST said, "We are very pleased that Epson, a leader in the inkjet printer market, has selected VaST solutions. Epsons selection is proof of the unique benefits that VaST virtualization brings to complex mechatronic system design. We look forward to working closely with Epson toward the reduction of design cycle time and quality improvement."

Published Tuesday, May 13, 2008 6:37 PM by David Marshall
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