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Virtutech Announces Simics Full-System Checkpointing for SystemC Based Transaction-Level Modeling
Virtutech®, Inc., the leader in virtualized systems development (VSD), today announced that Virtutech’s Simics® platform now provides full-system checkpointing for SystemC™ based transaction-level modeling (TLM). OEM and semiconductor developers now can save, restore and share the precise and full-system state to bypass lengthy system boot and restart steps, share the system among engineering team members, capture and duplicate bugs, parallelize testing and offer product training from virtual platforms.

Virtutech is the only vendor to enable full-system, mixed-architecture checkpointing that reaches far beyond a simple save and restore function for individual elements of a SystemC virtual platform. The Simics checkpoint captures a snapshot of the complete system and can be restored at any point or location, on any host and by anyone so that software development, integration or test efforts can continue as if they had never been interrupted. Simics checkpointing works with mixed modeling languages to enable unique capabilities such as language freedom, portability across model versions, differential saving of memory and disks, the ability to easily change the level of model abstraction and to archive multiple target setup configurations.

“As SystemC transitions towards becoming a more supported design language for ESL, full- system checkpointing for SystemC is one of the features that customers are beginning to expect and request from tool vendors,” said Mark Burton, managing director of GreenSocs Ltd. “Naturally, we are excited that Virtutech has now provided this capability within Simics. The use of checkpointing will increase model accuracy, development team productivity, and it is a feature that is critical to broadened adoption and use cases for SystemC models.”

In the past decade, checkpointing has become one of the most utilized and valuable capabilities within Virtutech Simics. The addition of SystemC checkpointing complements existing support for models written in C, C++ and Python to provide developers with a seamless, robust simulation solution for software, hardware and systems development bringing benefits that are difficult or impossible to achieve using physical hardware.

“We find that our customers are deploying increasingly complex mixed-architecture systems in combination with a variety of processors including CPUs, DSPs, ASICs and FPGAs,” said Michel Genard, vice president of marketing for Virtutech, Inc. “One of Virtutech’s competitive advantages is the ability for Simics to combine individual, checkpointable component models written in multiple languages within a full-system virtual platform.”

For further information, Virtutech executives will be available at the DAC conference taking place at the Moscone Center in San Francisco from Sunday, July 26 through Friday, July 31, 2009. Jakob Engblom, technical marketing manager, and Ross Dickson, principal technology specialist, both from Virtutech, will be discussing a jointly authored paper in the session, “Design Flow for Embedded System Device Driver Development and Verification,” on Tuesday, July 28, from 4:30 p.m. – 6:00 p.m., in room 132. Engblom will also be participating in the panel, “The Wild West: Conquest of Complex Hardware-Dependent Software Design,” on Thursday, July 30 in room 131.

Published Monday, July 27, 2009 3:07 PM by David Marshall
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